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                                <h1 id="i386&#x624B;&#x518C;&#x52D8;&#x8BEF;">i386&#x624B;&#x518C;&#x52D8;&#x8BEF;</h1>
<ul>
<li><p>17.2.1 ModR/M and SIB Bytes&#x4E2D;&#x7684;Table 17-3:</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,2 +?,2 @@
disp8[EDX]           010   42    4A    52    5A    62    6A    72    7A
-disp8[EPX]           011   43    4B    53    5B    63    6B    73    7B
+disp8[EBX]           011   43    4B    53    5B    63    6B    73    7B<br></div></div>
</li>
<li><p>17.2.1 ModR/M and SIB Bytes&#x4E2D;&#x7684;Table 17-4:
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,2 +?,2 @@
  Base =                   0     1     2     3     4     5     6     7</div></div></p>
</li>
<li>r32                      EAX   ECX   EDX   EBX   ESP   EBP   ESI   EDI</li>
<li>r32                      EAX   ECX   EDX   EBX   ESP   [<em>]   ESI   EDI
@@ -?,2 +?,2 @@
[ECX</em>2]              001    48    49    4A    4B    4C    4D    4E    4F
-[ECX<em>2]              010    50    51    52    53    54    55    56    57
+[EDX</em>2]              010    50    51    52    53    54    55    56    57
@@ -?,2 +?,2 @@
[EDX<em>4]              010    90    91    92    93    94    95    96    97
-[EBX</em>4]              011    98    89    9A    9B    9C    9D    9E    9F
+[EBX*4]              011    98    99    9A    9B    9C    9D    9E    9F
@@ -?,2 +?,2 @@
NOTES:</li>
<li>[*] means a disp32 with no base if MOD is 00, [ESP] otherwise. This provides the following addressing modes:</li>
<li><p>[<em>] means a disp32 with no base if MOD is 00. Otherwise, [</em>] means disp8[EBP] or disp32[EBP]. This provides the following addressing modes:<br>&lt;/div&gt;&lt;/div&gt;</p>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;DEC -- Decrement by 1
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,2 +?,2 @@
FF /1     DEC r/m16          2/6      Decrement r/m word by 1</div></div></p>
</li>
<li><p>DEC r/m32          2/6      Decrement r/m dword by 1
+FF /1     DEC r/m32          2/6      Decrement r/m dword by 1<br>&lt;/div&gt;&lt;/div&gt;</p>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;INC -- Increment by 1</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,2 +?,2 @@
FF  /0      INC r/m16                      Increment r/m word by 1
-FF  /6      INC r/m32                      Increment r/m dword by 1
+FF  /0      INC r/m32                      Increment r/m dword by 1<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;Jcc -- Jump if Condition is Met</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,2 +?,2 @@
72  cb         JB rel8           7+m,3    Jump short if below (CF=1)
-76  cb         JBE rel8          7+m,3    Jump short if below or (CF=1 or ZF=1)
+76  cb         JBE rel8          7+m,3    Jump short if below or equal (CF=1 or ZF=1)
@@ -?,2 +?,2 @@
7C  cb         JL rel8           7+m,3    Jump short if less (SF!=OF)
-7E  cb         JLE rel8          7+m,3    Jump short if less or equal (ZF=1 and SF!=OF)
+7E  cb         JLE rel8          7+m,3    Jump short if less or equal (ZF=1 or SF!=OF)
@@ -?,2 +?,2 @@
0F  8C cw/cd   JL rel16/32       7+m,3    Jump near if less (SF!=OF)
-0F  8E cw/cd   JLE rel16/32      7+m,3    Jump near if less or equal (ZF=1 and SF!=OF)
+0F  8E cw/cd   JLE rel16/32      7+m,3    Jump near if less or equal (ZF=1 or SF!=OF)<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;MOV -- Move Data</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,14 +?,14 @@
8C  /r       MOV r/m16,Sreg    2/2           Move segment register to r/m word
-8D  /r       MOV Sreg,r/m16    2/5,pm=18/19  Move r/m word to segment register
+8E  /r       MOV Sreg,r/m16    2/5,pm=18/19  Move r/m word to segment register
A0           MOV AL,moffs8     4             Move byte at (seg:offset) to AL
A1           MOV AX,moffs16    4             Move word at (seg:offset) to AX
A1           MOV EAX,moffs32   4             Move dword at (seg:offset) to EAX
A2           MOV moffs8,AL     2             Move AL to (seg:offset)
A3           MOV moffs16,AX    2             Move AX to (seg:offset)
A3           MOV moffs32,EAX   2             Move EAX to (seg:offset)
-B0 + rb      MOV reg8,imm8     2             Move immediate byte to register
-B8 + rw      MOV reg16,imm16   2             Move immediate word to register
-B8 + rd      MOV reg32,imm32   2             Move immediate dword to register
-Ciiiiii      MOV r/m8,imm8     2/2           Move immediate byte to r/m byte
-C7           MOV r/m16,imm16   2/2           Move immediate word to r/m word
-C7           MOV r/m32,imm32   2/2           Move immediate dword to r/m dword
+B0 + rb ib   MOV reg8,imm8     2             Move immediate byte to register
+B8 + rw iw   MOV reg16,imm16   2             Move immediate word to register
+B8 + rd id   MOV reg32,imm32   2             Move immediate dword to register
+C6 ib        MOV r/m8,imm8     2/2           Move immediate byte to r/m byte
+C7 iw        MOV r/m16,imm16   2/2           Move immediate word to r/m word
+C7 id        MOV r/m32,imm32   2/2           Move immediate dword to r/m dword<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;MUL -- Unsigned Multiplication of AL or AX</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,2 +?,2 @@
Flags Affected
-OF and CF as described above; SF, ZF, AF, PF, and CF are undefined
+OF and CF as described above; SF, ZF, AF, PF are undefined<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;OR -- Logical Inclusive OR</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,6 +?,6 @@
08  /r       OR r/m8,r8        2/6       OR byte register to r/m byte
09  /r       OR r/m16,r16      2/6       OR word register to r/m word
09  /r       OR r/m32,r32      2/6       OR dword register to r/m dword
-0A  /r       OR r8,r/m8        2/7       OR byte register to r/m byte
-0B  /r       OR r16,r/m16      2/7       OR word register to r/m word
-0B  /r       OR r32,r/m32      2/7       OR dword register to r/m dword
+0A  /r       OR r8,r/m8        2/7       OR r/m byte to byte register
+0B  /r       OR r16,r/m16      2/7       OR r/m word to word register
+0B  /r       OR r32,r/m32      2/7       OR r/m dword to dword register<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;PUSH -- Push Operand onto the Stack</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,3 +?,3 @@
FF   /6    PUSH m32      5        Push memory dword
-50 + /r    PUSH r16      2        Push register word
-50 + /r    PUSH r32      2        Push register dword
+50 + rw    PUSH r16      2        Push register word
+50 + rd    PUSH r32      2        Push register dword<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;REP/REPE/REPZ/REPNE/REPNZ -- Repeat Following String Operation
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,13 +?,13 @@
  service pending interrupts (if any);
  perform primitive string instruction;
  CountReg &lt;- CountReg - 1;
  IF primitive operation is CMPB, CMPW, SCAB, or SCAW
  THEN</div></div></p>
</li>
<li>IF (instruction is REP/REPE/REPZ) AND (ZF=1)</li>
<li>IF (instruction is REP/REPE/REPZ) AND (ZF=0)
THEN exit WHILE loop
ELSE</li>
<li>IF (instruction is REPNZ or REPNE) AND (ZF=0)</li>
<li><p>IF (instruction is REPNZ or REPNE) AND (ZF=1)
THEN exit WHILE loop;
FI;
FI;
FI;<br>&lt;/div&gt;&lt;/div&gt;</p>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;SBB -- Integer Subtraction with Borrow</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,6 +?,6 @@
18  /r       SBB r/m8,r8       2/6     Subtract with borrow byte register from r/m byte
19  /r       SBB r/m16,r16     2/6     Subtract with borrow word register from r/m word
19  /r       SBB r/m32,r32     2/6     Subtract with borrow dword register from r/m dword
-1A  /r       SBB r8,r/m8       2/7     Subtract with borrow byte register from r/m byte
-1B  /r       SBB r16,r/m16     2/7     Subtract with borrow word register from r/m word
-1B  /r       SBB r32,r/m32     2/7     Subtract with borrow dword register from r/m dword
+1A  /r       SBB r8,r/m8       2/7     Subtract with borrow r/m byte from byte register
+1B  /r       SBB r16,r/m16     2/7     Subtract with borrow r/m word from word register
+1B  /r       SBB r32,r/m32     2/7     Subtract with borrow r/m dword from dword register<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;SETcc - Byte Set on Condition</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,2 +?,2 @@
0F  94   SETE r/m8    4/5     Set byte if equal (ZF=1)
-0F  9F   SETG r/m8    4/5     Set byte if greater (ZF=0 or SF=OF)
+0F  9F   SETG r/m8    4/5     Set byte if greater (ZF=0 and SF=OF)
@@ -?,3 +?,3 @@
0F  9C   SETLE r/m8   4/5     Set byte if less (SF!=OF)
-0F  9E   SETLE r/m8   4/5     Set byte if less or equal (ZF=1 and SF!=OF)
-0F  96   SETNA r/m8   4/5     Set byte if not above (CF=1)
+0F  9E   SETLE r/m8   4/5     Set byte if less or equal (ZF=1 or SF!=OF)
+0F  96   SETNA r/m8   4/5     Set byte if not above (CF=1 or ZF=1)
@@ -?,2 +?,2 @@
0F  9D   SETNL r/m8   4/5     Set byte if not less (SF=OF)
-0F  9F   SETNLE r/m8  4/5     Set byte if not less or equal (ZF=1 and SF!=OF)
+0F  9F   SETNLE r/m8  4/5     Set byte if not less or equal (ZF=0 and SF=OF)<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;SHLD -- Double Precision Shift Left</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,2 +?,2 @@
Flags Affected
-OF, SF, ZF, PF, and CF as described above; AF and OF are undefined
+SF, ZF, PF, and CF as described above; AF and OF are undefined<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;SHLR -- Double Precision Shift Right</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,2 +?,2 @@
Flags Affected
-OF, SF, ZF, PF, and CF as described above; AF and OF are undefined
+SF, ZF, PF, and CF as described above; AF and OF are undefined<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;SUB - Integer Subtraction</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,6 +?,6 @@
28  /r      SUB r/m8,r8      2/6      Subtract byte register from r/m byte
29  /r      SUB r/m16,r16    2/6      Subtract word register from r/m word
29  /r      SUB r/m32,r32    2/6      Subtract dword register from r/m dword
-2A  /r      SUB r8,r/m8      2/7      Subtract byte register from r/m byte
-2B  /r      SUB r16,r/m16    2/7      Subtract word register from r/m word
-2B  /r      SUB r32,r/m32    2/7      Subtract dword register from r/m dword
+2A  /r      SUB r8,r/m8      2/7      Subtract r/m byte from byte register
+2B  /r      SUB r16,r/m16    2/7      Subtract r/m word from word register
+2B  /r      SUB r32,r/m32    2/7      Subtract r/m dword from dword register<br></div></div>
</li>
<li><p>17.2.2.11 Instruction Set Detail&#x4E2D;&#x7684;XOR - Logical Exclusive OR</p>
<div class="ace"><div class="aceCode" data-config="{&quot;edit&quot;:false,&quot;lang&quot;:&quot;diff&quot;,&quot;check&quot;:false,&quot;theme&quot;:false}">@@ -?,6 +?,6 @@
30  /r      XOR r/m8,r8      2/6      Exclusive-OR byte register to r/m byte
31  /r      XOR r/m16,r16    2/6      Exclusive-OR word register to r/m word
31  /r      XOR r/m32,r32    2/6      Exclusive-OR dword register to r/m dword
-32  /r      XOR r8,r/m8      2/7      Exclusive-OR byte register to r/m byte
-33  /r      XOR r16,r/m16    2/7      Exclusive-OR word register to r/m word
-33  /r      XOR r32,r/m32    2/7      Exclusive-OR dword register to r/m dword
+32  /r      XOR r8,r/m8      2/7      Exclusive-OR r/m byte to byte register
+33  /r      XOR r16,r/m16    2/7      Exclusive-OR r/m word to word register
+33  /r      XOR r32,r/m32    2/7      Exclusive-OR r/m dword to dword register<br></div></div>


</li>
</ul>
<footer class="page-footer-ex"> <span class="page-footer-ex-copyright"> By <a href="https://sashimi-yzh.github.io/" target="_blank">Zihao Yu</a>, &#x91C7;&#x7528;<a href="http://creativecommons.org/licenses/by-nc-sa/3.0/cn/" target="_blank">&#x77E5;&#x8BC6;&#x5171;&#x4EAB; &#x7F72;&#x540D;-&#x975E;&#x5546;&#x4E1A;&#x6027;&#x4F7F;&#x7528;-&#x76F8;&#x540C;&#x65B9;&#x5F0F;&#x5171;&#x4EAB; 3.0 &#x4E2D;&#x56FD;&#x5927;&#x9646; &#x8BB8;&#x53EF;&#x534F;&#x8BAE;</a>&#x53D1;&#x5E03; </span> &#xA0;&#xA0;&#xA0;&#xA0;&#xA0;&#xA0;&#xA0;&#xA0;&#xA0;&#xA0; <span class="page-footer-ex-footer-update"> &#x6B64;&#x9875;&#x9762;&#x4FEE;&#x8BA2;&#x4E8E;:  2019-05-03 18:33:11 </span> </footer>
                                
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